Symposium Chair: Dr. Kaidong Xu, Leuven Instruments, China
| ** | to designate keynote talk - 30 min | |||
| * | to designate invite talk - 25 min | |||
| to designate regular talk - 15 min |
Sunday, March 22, 2026, Kerry Hotel Pudong, Shanghai
Meeting Room: Pudong Ballroom 1
Session I: Joint Session Symposium II & Symposium III
Session Chair: Leo Pang & Kaidong Xu
| 13:30-13:40 | Openning Remarks |
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| **13:40-14:10 | Production-Ready Full-Chip Entirely Curvilinear ILT and Curvilinear Masks for DUV |
| Leo Pang, D2S, Inc. | |
| **14:10-14:40 | Ion Beam Technology for Advanced Patterning of Logic and Memory Devices |
| Zheng Tao, Leuven Instruments | |
| **14:40-15:10 | The Challenge of Advanced Patterning in 3D-DRAM Technology |
| Zhonghua Jin, Beijing Superstring Academy of Memory Technology | |
| 15:10-15:25 | Break Time |
Session II: Advanced Patterning - Part 1
Session Chair: Kaidong Xu
| *15:25-15:50 | Etch Solutions for Advanced Specialty |
| Jim Zhang, Lam Research | |
| *15:50-16:15 | Etch Profile Tilting Improvement on Sym3™Y |
| Sichao Zeng, Applied Materials China | |
| 16:15-16:30 | Coffee Break |
| 16:30-18:00 | Panel Discussion (Meeting Room: Pudong Ballroom 1) |
Monday, March 23, 2026, Kerry Hotel Pudong, Shanghai
Meeting Room: Pudong Ballroom 1
Session III: Advanced Patterning - Part 2
Session Chair: Zuixin Zeng
| **08:30-09:00 | IBS Enhanced DRAM Technology: The New Patterning Revolution Brought About by New Tools |
| Juhani Xiang, CXMT | |
| *09:00-09:25 | ICP Etch For Advanced Technology Node |
| Tao Zhong, Beijing NAURA Technology Group | |
| 09:25-09:40 | Comprehensive Etching Solution for Patterning Layer Profile Control and Titanium Residue Removal in Advanced Logic Trench Processes |
| Chia Lin Lu, Applied Materials | |
| 09:40-09:55 | TSV, The Key Process for Advanced 3D IC |
| Zejing Cao, Beijing NAURA Technology Group | |
| 09:55-10:10 | Coffee Break |
Session IV: Memory Applications
Session Chair: Ke Jiang
| **10:10-10:40 | Tungsten-Doped Carbon Hard Mask Etch Profile Control for High-Selectivity Channel Hole Etching |
| Nikky Shan, YMTC | |
| *10:40-11:05 | Synergy of Ion and Highly Reactive Species in Cryogenic Plasma Etching |
| Yingxin Guan, Advanced Micro-Fabrication Equipment Inc. | |
| 11:05-11:20 | Application of Advanced Pulsing and Novel Chemistry in High Aspect Ratio Etching Process |
| Haoran Cao, Lam Research | |
| 11:20-11:35 | The Investigation of Cryogenic High-Aspect-Ratio Trench Etch by Loop Function |
| Bin Liu, Advanced Micro-Fabrication Equipment Inc. | |
| 11:35-11:50 | Silicon Recess Etch Technology for Storage Contact in Memory Cell Manufacturing |
| Pei Mei, Beijing NAURA Technology Group | |
| 11:50-13:30 | Lunch Break |
Session V: FEOL/MOL Etching
Session Chair: Zhijie Hao
| 13:30-13:45 | SOC Precise Etch-Back Process for Future CFET Device Applications |
| Xin Liu, Institute of Microelectronics of the Chinese Academy of Sciences | |
| 13:45-14:00 | Optimizing Plasma Ignition in Inductively Coupled Plasma Reactors for Electronegative Chemistries at Low Pressure |
| Jingsi Cui, Jiangsu Leuven Instruments Co. Ltd | |
| 14:00-14:15 | Investigation the Effect of Chamber Wall Pre-Coating and Substrate on the HK-MG Dummy Polysilicon Removing Process |
| Fanglin Huo, Advanced Micro-Fabrication Equipment Inc. | |
| 14:15-14:30 | Break Time |
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Session VI: BEOL Etching
Session Chair: Zheng Tao
| *14:30-14:55 | RF Pulsing Technology for BEOL Etch Process |
| Bo Wang, TEL | |
| *14:55-15:20 | Chamber-Matching Diagnosis Using In-Situ Deposition and OES Endpoint Metrology |
| Xiaowei Li, Leuven Instruments | |
| 15:20-15:35 | A comprehensive Study on LWR Improvement in Metal Hard Mask Etching |
| Yun Xiao, Lam Research | |
| 15:35-15:50 | Optimization of Dielectric Etch in Ultra Deep Via |
| Ya Zhou, Advanced Micro-Fabrication Equipment Inc. | |
| 15:50-16:05 | Improve Al Etch Productivity Performance by Equipment Intelligence® Data Analysis (EI-DA) |
| Chenchen Zhao, Lam Research | |
| 16:05-18:00 | Coffee Break |
| 16:00-18:00 | Poster Session |
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Tuesday, March 24, 2026, Kerry Hotel Pudong, Shanghai
Meeting Room: Function Room 3
Session VII: Wet Etch and Compound Etching
Session Chair: Zhongwei Jiang
| *08:30-08:55 | Wet Clean Optimization to Control the Cu Loss in BEOL AIO Process |
| DongMei Zhai, STIC | |
| 08:55-09:10 | Outgassing Evaluation of Cleaning Techniques Applied to Different Semiconductor Parts |
| Ling Wang, Ferrotec Technology Development (Guangzhou) Co. Ltd | |
| 09:10-09:25 | Atomic Layer Etching of (Al)GaN: Investigation and Characterization of Etching Damage |
| Qiang Wang, State Grid Shanxi Electric Power Company Electric Power Research Institute | |
| 09:25-09:40 | Deep SiC ICP Etching for Superjunctions |
| Xiaoyu Tan, Beijing NAURA Technology Group | |
| 09:40-09:55 | Ptimizing Scrubber Clean for TIN Residue after MHM TIN Deposition and ETCH in advance BEOL Technology |
| Xinlong Zhao, SiEn (Qingdao) Semiconductor corporation Co. Ltd. | |
| 09:55-10:10 | Break Time |
Session VIII: Logic Applications
Session Chair: Zhongwei Jiang
| *10:10-10:35 | Study of Different Selective Etching Methods in Process of Gate-all-around FET |
| Junjie Li, IMECAS | |
| 10:35-10:50 | Tunable High-K Profile Control in 28nm Metal Gate Etching |
| Junming Wang, Lam Research | |
| 10:50-11:05 | Development of Single Diffusion Break Fin Cut Etch Process for Logic FinFET Application |
| Litian Xu, Beijing NAURA Technology Group | |
| 16:00-18:00 | Poster Session: Monday, March 23 (3F, Kerry Hotel Pudong, Shanghai) |
| 3-2 | Process Optimization for the Prevention of Cu Void Defects In Damascus AIO Etching |
| Xiaoyu Wang, Nexchip Semiconductor Corporation | |
| 3-3 | A Process Method for Improving Corrosion, Void and PR Residue Defects in Tm30k Structure |
| Jiange Feng, Nexchip Semiconductor Corporation, Hefei, China | |
| 3-5 | Enhancements of High Throughput TSV Etching Repeatability in Mass Production |
| Zheng Ruan, Lam Research | |
| 3-18 | Innovative Solution for Ta Pillar Metal Hard-mask Open in MRAM Technology |
| Lin Shao, Lam Research | |
| 3-19 | High Open Ration BT Pad Residue Defect Impove |
| Xu Chu, Nexchip Semiconductor Corporation, Hefei, China | |
| 3-20 | A Method to Minimize Total Thickness Variation with Dripping Reduction System Implementation |
| Zhi Shen, Lam Research | |
| 3-22 | Metal Etch Particle Experiments and Improvements Reduce Defects and Scrap |
| Renbao Kuai, Nexchip Semiconductor Corporation, Hefei, China | |
| 3-23 | Analysis of Gate Oxide Defect Formation Causes and Improvement Methods in Poly Gate Etching |
| Cheng Fang, Nexchip Semiconductor Corporation, Hefei, China | |
| 3-24 | An Improved ICP Method in CMOS Image Sensors |
| Jianfei Hu, Nexchip Semiconductor Corporation, Hefei, China | |
| 3-25 | Impact of Bias Power on Oxygen Radical Availability: Balancing In-Situ Resist Strip and Chamber Cleaning Efficiency Based on Radical Partitioning |
| Xingnan Liu, Jiangsu Leuven Instruments Co. Ltd | |
| 3-27 | A Study of the Slot Effect in Dry Etch |
| Chenxi Jiang, SiEn (QingDao) Integrated Circuits Co. Ltd. | |
| 3-28 | The Bulge Defect Formation and Reduction of BEOL Top Metal ETCH Process |
| Qing Mao, Shanghai Huali Microelectronics Corporation | |
| 3-29 | A Novel Passivation Approach to Mitigate Si Showerhead Damage and Residue Defects in Low-k Etching Processes |
| Weiming Liu, Advanced Micro-Fabrication Equipment Inc. | |
| 3-32 | Study of the Titanium Nitride Damage During the Wet Etch Process in Logic Device |
| Yaofeng Liu, GHS semiconductor | |
| 3-34 | Further Performance Testing of P-Type Transistor with Dual-Curvature Cavity |
| Ying Zhou, SiEn (Qingdao) lintegrated Circuits Co, Ltd | |
| 3-36 | Wet Process Design for Improving Backside Poly Etching Uniformity |
| Jing Liu, SiEn (Qingdao) Semiconductor corporation Co. Ltd. | |
| 3-39 | Wet Process Control for Minimizing Key Pattern Lithography Rework Effects on CD |
| Yanping Guo, SiEn (Qingdao) Semiconductor corporation Co. Ltd. | |
| 3-40 | Improvement of Gate Oxide Quality by Optimizing Wet Pre-Clean Process |
| Shuang Cui, SiEn (Qingdao) Integrated Circuits Co., Ltd. | |
| 3-41 | Relationship Study of Wet Clean Process with via Recess for EM Improve |
| Weijie Kong, SiEn (Qingdao) Semiconductor corporation Co.Ltd. | |
| 3-42 | Process Optimization of Silicon Pillar Array Etching for Metalenses Applications |
| Enze Zhao, ZhejiangUniversity | |
| 3-44 | Effects of Deionized Water Cleaning Process on Wave Propagation Dynamics and Interfacial Bond Strength in Wafer Bonding |
| Huibin Wu, Semiconductor Manufacturing North China (Beijing) Corp | |
| 3-45 | Peeling Defect Suppression and Yield Enhancement in CIS Device Fabrication |
| Ling Liu, Semiconductor Manufacturing North China (Beijing) Corp | |
| 3-48 | A Study of Gas Distribution Influence on TSV Process |
| Changhuo Liu, Peking University | |
| 3-49 | Photoresist Trim Control for 3D NAND Staircase Etching |
| Han Wang, Advanced Micro-Fabrication Equipment Inc. | |
| 3-50 | Impact Of Plasma Induced Charging Damage Electric Property And Exploration On Plasma System |
| Yang Wei, Nexchip semiconductor corporation | |
| 3-51 | The Etching of IZO/HfO2/IGZO in an Ion Beam Etching System and an Inductively Coupled Plasma Reactor |
| Jiahui Sun, Beijing Superstring Academy of Memory Technology | |
| 3-52 | Mechanism and Mitigation of Ti Residue Formation in BEOL MHM AIO |
| Weiming Liu, Advanced Micro-Fabrication Equipment Inc. | |
| 3-54 | The Profile Control of High Aspect Ratio Amorphous Carbon through Polymer Gas Distribution Optimization |
| Hongqiu Wang, Advanced Micro-Fabrication Equipment Inc. | |
| 3-55 | Plasma Characterization of Multi-Level Pulsing System in Advanced Node Etching Processes |
| Jiahui Liu, Advanced Micro-Fabrication Equipment Inc. | |
| 3-56 | A New Technology for 3D DRAM Deep Silicon Trench Etch |
| Jingjing Luo, 中微半导体设备（上海）股份有限公司 | |
| 3-57 | A Two-Step Dry Etching Process for Plating-Friendly, Large-Opening, Inverted-Trapezoid TSV |
| Ruiting Zhang, Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences | |
| 3-58 | High Aspect Ratio Deep Trench Isolation Etching for Advanced Memory Application |
| Lei Lei, Advanced Micro-Fabrication Equipment Inc. | |
| 3-59 | Lam Spectral Reflectometer for Advanced Super-junction Deep Trench Etch Process Control and Yield Enhancement |
| Shanshan(Sera) Nie, Lam research | |
| 3-60 | Organic Micro-lens Array Morphology Control by Plasma Etching |
| Zhenqi Liu, Advanced Micro-Fabrication Equipment Inc. | |
| 3-61 | A Holistic Approach to Profile and Critical Dimension Control in High-Aspect-Ratio Silicon Nitride Pillar Etch |
| Zhiping Shao, Advanced Micro-Fabrication Equipment Inc. | |
| 3-62 | Advanced DRAM Buried Wordline Trench Process Technology Development |
| Yifei Luo, Advanced Micro-Fabrication Equipment Inc. | |
| 3-63 | Step Height Control of SiN Spacer in Contact Etch Progress |
| Xue Li, Advanced Micro-Fabrication Equipment Inc. | |
| 3-64 | Effective Solution And Mechanism of Line Roughness Improvement In ICP Etch |
| Leiting Jia, Advanced Micro-Fabrication Equipment Inc. | |
| 3-65 | A Study on TiN-Residue-Induced Partial Etch in Metal Hard Mask Etching Process |
| Ting Yao, Zhejiang ICsprout Semiconductor Co., Ltd | |
| 3-67 | An Innovative ICP Solution for BEoL Passivation Etch |
| Weipeng Jiang, Beijing E-town Semiconductor Technology Co.,Ltd. | |
| 3-69 | Semulator3D® Facilitates Fast and Precise STI Shoulder Profile Tunin |
| Chenchen Zhao, Lam Research | |
| 3-73 | Dimple Defect Reduction in Wafer Thinning of Hybrid Bonding BSI Process |
| Zhichao Niu, Lam Research | |
| 3-75 | Sym3™Y In-Situ ALD Solution for High Aspect Ratio Etch Profile Control |
| Tianyuan Liu, Applied Materials China | |
| 3-77 | Bowing Profile Improvement Solution to HAR Carbon HMO on Sym3TM |
| Xipeng Tong, Applied Materials China | |
| 3-78 | CD Uniformity Improvement by Thermal Pad Ring in Sym3®GT |
| Ping Zheng, Applied Materials China | |
| 3-80 | Regulation of Line CD Imbalance in Reverse Self-Aligned Double Patterning |
| Shun Yang, Beijing NAURA Technology Group | |
| 3-81 | BF₃-based Plasma Doping for Sidewall Boron Incorporation in CIS Deep Trench Isolation Structures |
| Jie Wang, Beijing NAURA Technology Group | |
| 3-82 | Shrinkage of Pattern CD by using Inductively Coupled Plasma for Logic MOL Dielectric Layers Etch Application |
| Junkai Yan, Beijing NAURA Technology Group | |
| 3-83 | Research on Control and Optimization Methods for Polymer Residue in Aluminum Etching Process |
| Chao Ding, Beijing NAURA Technology Group | |
| 3-84 | Etching Characteristics of Indium Tin Oxide Thin Films Using Cl2-Based Plasma |
| Yuan Deng, Beijing NAURA Technology Group | |
| 3-85 | Strategy to Clear the Etching by Product Residues in IGZO Etch Process with Inductively Coupled Plasma |
| Yingjie Wang, Beijing NAURA Technology Group | |
| 3-86 | Solution and Mechanism for the Metal Line Corrosion Issue in Semiconductor BEOL Aluminum Etch Process |
| Wangjian Liao, Beijing NAURA Technology Group | |
| 3-88 | Removal of Hydrogen-Containing Byproducts to Enhance Pre-Coating Quality in Etching Chamber |
| Songmo Du, Beijing NAURA Technology Group | |
| 3-89 | Isotropic Etching Of SIGE Alloys With High Selectivity To SI |
| Yiming Ma, Beijing NAURA Technology Group | |
| 3-91 | The Photoresist Trim Process in Advanced Packaging |
| Zihan Dong, Beijing NAURA Technology Group | |
| 3-93 | Gas Cluster Ion Beam Aberration Correction in Wafer Level Total Thickness Variation Optimizing |
| Tong Xin, Beijing NAURA Technology Group | |
| 3-94 | Optical Emission Spectroscopy Studies of NF3/H2/He Down Stream Inductively Coupled Plasmas |
| Xingcun Li, Beijing NAURA Technology Group | |
| 3-95 | Top Bowing Optimization of High Aspect-ratio DTC with Low-Temperature Plasma Etching |
| Zhaoxuan Zhang, Beijing NAURA Technology Group | |
| 3-96 | An In-Situ Real-Time Monitoring and Restoration System for Quartz Tube Damage in Ashing Machines |
| Jiamin Deng, Beijing NAURA Technology Group | |
| 3-97 | Mechanism and Effect of Etchant Flow on SOH Mask Tri-Layer Plasma Etching |
| Zinuo Chen, AMEC | |
| 3-98 | Selective Silicon Boride Etch to Form Titanium Nitride Pillar during Capacitor Memory Cell Manufacturing |
| Xuehua Wang, Beijing NAURA Technology Group | |
| 3-43 | Gate Etch Pull Back Profile Improved by SiCl4/O2 Cycle Pre-Dep |
| Jerry MA, Lam Research | |
| 3-47 | Essential EOS Functional Requirements for RCA Clean Implementation |
| Xiaowei Cheng, Lam Research | |
| 3-70 | Process Development on GaN and AlGaN Etch Using Low Voltage Bias Pulsing Etching |
| Yao Yan, Lam Research | |
| 3-71 | Defects Improvement in MIM Plate Etching Process |
| Yingying Zhou, Lam Research | |
| 3-90 | An Automated Framework for Tem Image Analysis and Etching Performance Evaluation |
| Huihui Wang, Beijing NAURA Technology Group |