(** to designate keynote talk, * to designate invite talk)

Sunday, March 11, 2018 Shanghai International Convention Center
Meeting Room：3E

Session I: Design for Artificial Intelligence
Session Chair: Yiyu Shi

13:30-13:35 Opening Remarks
  Yiyu Shi
**13:35-14:05 ThirdEye: Visual Assist for Grocery Shopping
  Vijay Narayanan, Pennsylvania State University
**14:05-14:35 Statistical Validation for Autonomous Driving Systems
  Xin Li, Duke University & Duke Kunshan University
**14:35-15:05 How to Obtain and Run Light and Efficient Deep Learning Networks
  Yiran Chen, Duke University
**15:05-15:35 Which Neural Networks are the “Best”? - -- A case study of technology, circuit and architecture impacts on the MNIST Dataset
  Sharon Hu, University of Notre Dame
15:35-15:50 CELLULAR NEURAL NETWORK (CENN) FPGA IMPLEMENTATION USING MULTI-LEVEL OPTIMIZATION
  Zhongyang Liu, Zhejiang University
15:50-16:05 Coffee Break
 

Session II: On-Chip Design for Communications
Session Chair: Masanori Hashimoto

16:05-16:10 Opening Remarks
  Masanori Hashimoto
16:10-16:25 A Buck-Boost Converter for Envelope Tracking RF Power Amplifier with 5us Settling Time in 180nm CMOS Process
  Jiawen Hu, Shanghai Exceleration Semiconductor Ltd.
16:25-16:40 Quadrature Amplitude Modulated Backscatter for 2.4GHz Self-Powered Chips
  Zhang Luyao, Peking University
16:40-16:55 A Measurement Method for the Chip-to-Board Transmission of Radio Frequency Waves in the Power Distribution Networks with Simple Embedded Circuits
  Luo Lan, Sun Yat-sen University
   
Poster Session: Location: 5th Floor    
Coffee Break Implementation of Heart Rate Detection Algorithm Based on a Low Power Chip
  Yingying Wu, The Key Lab of Integrated Microsystems Peking University Shenzhen Graduate School
  DESIGN AND IMPLEMENTATION OF A LOW-COMPLEXITY R-PEAK DETECTION ALGORITHM
  ChenZiRong, The Key Lab of Integrated Microsystems Peking University Shenzhen Graduate School
  An Application-learnable Neuromorphic Frequency Synthesizer with Random Vector Neural Network
  Lizhao Gao, Peking University Shenzhen Graduate School
  Empowering Edge Mining on Smartphones with Reconfigurable Fabrics
  Yan Zeyu, Huazhong University of Science and Technology
  Accelerating Earth Movers Distance with Instruction Set Extension for Image Retrieval
  Yu Guangyu, Huazhong University of Science and Technology
  A universal implementation of cardiovascular disease surveillance based on HRV
  Yufan Feng, Peking University Shenzhen Graduate School
  A Low-Offset Current-Mode CMOS Vertical Hall Sensor Microsystem with Four-Phase Spinning Current Technique
  Yue Xu, Nanjing University of Posts and Telecommunications
  A novel gas sensor signal drift adjustment method based on controlled measurement
  Chang-Yong Chiu, Shanghai University


Monday, March 12, 2018 Shanghai International Convention Center

Joint Session: Symposium II and Symposium IX-DTCO joint session
Meeting Room: 3rd Floor Yellow River Hall
Session Chairs: Yiyu Shi / Leo Pang

8:30-8:35 Opening Remarks
  Yiyu Shi / Leo Pang
**8:35-9:05 Close – loop – design and manufacturing optimization for advanced nodes
  Steffen Schulze, Mentor Graphics
**9:05-9:35 Machine Learning for Lithography and Physical Design
  David Pan, University of Texas at Austin
**9:35-10:05 Novel Approaches to Circuit Timing
  Ulf Schlicthmann, Technical University of Munich
10:05-10:20 Coffee Break
   

Meeting Room: 3E
Session IV: ACM SIGDA Special Session
Session Chair: Yiyu Shi

10:20-10:25 Opening Remarks
  Yiyu Shi
*10:25-10:40 Introduction of SIGDA
  Vijay Narayanan, Penn State University
*10:40-10:55 Sponsored conferences: current status and procedure to apply
  Sharon Hu, University of Notre Dame
*10:55-11:10 Awards and Chapters
  Xin Li, Duke University & Duke Kunshan University
*11:10-11:25 Educational activities
  Yiran Chen, Duke University

*11:25-11:40

Award winner presentation
  Yier Jin, University of Florida
*11:40-11:55 Award winner presentation
  TBD
11:55-13:30 Lunch Break
   

Session V: Design for X
Session Chair: Chuan Zhang

13:30-13:35 Opening Remarks
  Chuan Zhang
*13:35-13:55 Electrical and thermal characterization of SiC power MOSFET
  Takashi Sato, Kyoto University
*13:55-14:15 MTTF-aware Design Methodology for Adaptive Voltage Scaling
  Masanori Hashimoto, Osaka University
14:15-14:30 Analysis of Affecting Factors in Neutron Interactions with Gate Oxide in CMOS Transistors
  C.-Z. Chen, Qualchip Technologies, Inc.
14:30-14:45 Low area overhead state retained power gating flip-flop
  Cynthia Hao, NXP semiconductor, China
14:45-15:00 An Improved S-box of Lightweight Block Cipher Roadrunner for Hardware Optimization

Juhua Liu, Tsinghua University
15:00-15:30 Coffee Break
   

Session VI: Optimization/High-speed VLSI Circuits
Session Chair: Takashi Sato

15:30-15:35 Opening Remarks
  Takashi Sato
*15:35-15:55 CERAMIC INTERCONNECT BRIDGE FOR HETEROGENEOUS INTEGRATION AND MULTIPLE CHIP PACKAGING
  Boping Wu, Huawei Technologies
*15:55-16:15 Optimizing Stochastic Number Generators for Stochastic Computing
  Weikang Qian, Shanghai Jiaotong University/University of Michigan
*16:15-16:35 Auto-Generation of Pipelined Hardware Designs for Polar Encoder 
  Chuan Zhang, Southeast University
*16:35-16:55 An accelerator-aware microarchitecture simulator for design space exploration
  Cheng Zhuo, Zhejiang University
*16:55-17:15 Making Aging Useful: A Novel Wake-up Scheduling Approach

Yuguang Chen, Yuan Ze University
17:15-17:30 High-speed Implementation of SM2 Based on Fast Modulus Inverse Algorithm
  Li Wei, Tsinghua University
17:30-17:45 TECHNOLOGY MEDIATED TUTORIAL ON RISC-V CPU CORE IMPLEMENTATION AND SIGN-OFF USING REVOLUTIONARY EDA MANAGEMENT SYSTEM (EMS) - VSDFLOW
  Kunal Ghosh, VLSI System Design Corporation Pvt Ltd
17:45-18:00 An Improved Leakage-Driven Runtime Decap Modulation Algorithm for Microprocessors
  Leilei Wang, ShanghaiTech University