| ** | to designate keynote talk - 30 min | |||
| * | to designate invite talk - 30 min | |||
| to designate regular talk - 15 min |
Monday, June 26, 2023 Shanghai International Convention Center
Session I: Lithography / Etch joint session (II & III)
Meeting Room: 5th Floor Yangtze River Hall
Session Chair:
| 13:30-13:35 | Opening Remarks |
| **13:35-14:05 | Lithography Material Challenge |
| Allen Chang, JSR | |
| **14:05-14:35 | Co-advancing Scaling Techniques and Functionality Enhanced Potential Device Infrastructures |
| David Xiao | |
| **14:35-15:05 | An ocean of opportunities in a fast growing market using ASML TWINSCAN systems |
| Henri van Helleputte, ASML Netherlands B.V. | |
| 15:05-15:20 | Coffee Break |
Session II: Advanced Patterning
Meeting Room: 3C+3D
Session Chair: Ying Zhang
| *15:20-15:50 | Trimming of Silicon Nitride Hard Mask Using Cyclic Deposition and Etch Process |
| Litian Xu, Beijing NAURA Microelectronics Equipment Co., Ltd | |
| *15:50-16:20 | Ion Beam Etching as a Patterning Solution for AR/VR Applications |
| Yuxin Yang, Leuven Instruments | |
| 16:20-16:35 | The Investigation of CF3I for High-aspect-ratio Cryogenic Dielectric Etch |
| Jianqiu Hou, Advanced Micro-Fabrication Equipment Inc. | |
Tuesday, June 27, 2023 Shanghai International Convention Center
Meeting Room: 3C+3D
Session III: FEOL/MOL Etching
Session Chair: Hai Cong
| 9:00-9:15 | Optimizing SiARC Residue Reduction Methods with Minimizing Profile Change |
| Xingxing Xu, Lam Research Service Co. Ltd | |
| 9:15-9:30 | A Study of NAND Flash Device Cycling Performance Improvement via FG Carbon-doped Polysilicon and Channel Corner Rounding |
| Jun Wang, Peking University | |
| *9:30-10:00 | The challenges and perspective solutions of TSV etching for 3D and 2.5D applications |
| Guorong Li, Beijing NAURA Microelectronics Equipment Co., Ltd | |
| 10:00-10:30 | Coffee Break |
Session IV: Resists Etch/Wet Etch/Clean/MEMS
Session Chair: Tom Ni
| *10:30-11:00 | 8-inch CCP Etch Solutions for the Emerging Devices |
| Dongsan Li, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 11:00-11:15 | TBD |
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| 11:15-11:30 | Enabling Plasma Etch Solution for GaN Technology |
| Chunxiang Guo, Jiangsu Leuven Instruments Co., Ltd. | |
| 11:30-11:45 | Effect of Process Gas on Side Wall Angle in Silicon Trench Etching |
| Yiming Ma, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 11:45-12:00 | Optimization of SADP Process for Tiny Bridge Defect Reduction in Planar 2D NAND Flash |
| Jun Wang, Peking University | |
| 12:00-13:30 | Lunch Break |
Session V: BEOL Etching and Memory Etch
Session Chair: Qingjun Zhao
| 13:30-13:45 | Beyond 20nm DRAM Dielectric Etch Introduction and Position |
| Zengwen Hu, Advanced Micro-Fabrication Equipment Inc. | |
| 13:45-14:00 | Distortion Control when Etching Dram Metal Contact |
| Jianqiu Hou, Advanced Micro-Fabrication Equipment Inc. | |
| 14:00-14:30 | Coffee Break |
Session VI: ALE and Patterning
Session Chair: Kaidong Xu
| *14:30-15:00 | AMEC Etch Product Innovation for Advanced Technology and MtM Applications |
| Wuping Liu, Advanced Micro-Fabrication Equipment Inc. | |
| 15:00-15:15 | The Plasma Etching of the Deep Hole Structure in Silicon with the Mixed Gas of SF6, HBr and O2 |
| Qifei Wang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 15:15-15:30 | Mechanism of SiC Reactive Ion Etching in SF6O2Ar Inductively Coupled Plasma |
| Anton Kobeiev, Suzhou STR Software Technology Co., Ltd | |
| 15:30-15:45 | Control of Deposition in Cyclic Deposition/Etch Process |
| Zihan Zhang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 15:45-16:00 | A Novel Method to Eliminate Pad Crystal |
| Fred Meng, Guangzhou CanSemi Technology Inc. | |
| Poster Session: | |
| Investigation of CD Precise Control in Pitch Doubling Flow for Memory Industry | |
| Zhao Liu, Superstring Memory Research Institute | |
| Technical Difficulties and Optimization Methods of NMOS Share CT in Contact Etching | |
| Peng Zhu, Shanghai Huali Integrated Circuit Manufacturing Corporation | |
| The Optimization of Pin Hole Defect in High Resistance Process | |
| Lunan Zhu, Shanghai Huali Integrated Circuit Manufacturing Corporation | |
| Investigation of Fin Profile in Advanced DRAM Buried Word Line Etching | |
| Kevin Yao, Lam Research | |
| FTT and Lookahead Function Optimize Temperature Stabilization Time | |
| Li Zhe, Lam research | |
| Tungsten Silicon oxide Titanium nitride Stack Etching | |
| Jie Luo, Beijing Superstring Acadamy of Momery Technology | |
| Symmetric spacer etch in SAQP with advanced RF pulsing | |
| Yuyang Sun, Lam Research | |
| Advanced Mixed Mode Pulsing in DRAM High Aspect Ratio Punch | |
| Zheng Ruan, Lam Research | |
| Plasma Treatment Effect on Line Width Roughness Improvement | |
| Shipeng Gong, Lam Research | |
| Application of Advanced RF Pulsing for DRAM Patterning LCDU Improvement | |
| Hui Xu, Lam Research | |
| Local CD Uniformity (LCDU) improvement in DRAM Capacitor Hard Mask Etch | |
| Nick Fang, Lam Research | |
| Line Width Roughness and Critical Dimension Uniformity Improvement in Self-Aligned Contact patterning in DRAM | |
| Julia Zheng, Lam Research | |
| Control of Landing Hole Shape in DRAM Contact Etch | |
| Liubo Ma, Lam Research | |
| Striation Improvement in Dual Damascene Via Etch with Capacitively Coupled Plasma | |
| Wei Wang, Lam Research | |
| 300mm Wafer Thinning Uniformity Improvement | |
| Bowen Dai, Lam Research | |
| Chamber Condition Indicated by Mahalanobis Distance in Lam EI-DA | |
| Jeremy Wu, Lam Research | |
| Electronic Chemical Plating Gap Fill Improvement by Chemical Concentration and Plating Current | |
| Bruce Fan, Lam Research | |
| Wet Etch Resistance Improvement of PECVD SiN by Hydrogen Concentration Optimization | |
| Dandan Qi, Lam Research | |
| Novel Inline Thickness Measurement System Of Ultrathin Wafer Thickness Control For Power Device | |
| Haibo Liu, Lam Research | |
| A Study on Si Cavity Formation by Combination of Isotropic Wet Etch and Anisotropic Dry | |
| Tianhao Zhang, Lam Research | |
| Optimizing Metallic-Based Polymer Removal in the Indium Tin Oxide Etching | |
| Quanbao Li, Lam Research | |
| Efficient Solution to Chamber Matching by Equipment Intelligence®-Data Analyzer | |
| Wan Hsuan Wu, Lam Research | |
| ACHIEVEMENTS ON CONFORMABILITY OF SILICON NITRIDE FILM AFTER WET-ETCHING | |
| Wenbo Lou, Piotech, Inc | |
| The TaN Metal-Insulator-Metal (MIM) Dry Etching Residue Removal in Inductively Coupled Plasma Process | |
| Wenda Jia, Lam Research | |
| Study on W Filling Void Improvement by Chamfered Gate | |
| PengFei Lyu, Lam Research | |
| Selective Bottom Layer Punch-Through in High Aspect Ratio TSV For Advanced CIS Processing | |
| Ruxun Yuan, Lam Research | |
| Study of Etch Rate and Profile Control by NF3/CL2/O2 Chemistry on W Grid Etch for CMOS Image Sensor (CIS) | |
| Yayu Hong, Lam Research | |
| The Influence of Fin Recess Shape on Device Performance | |
| Ya-Ming Liu, Lam Research | |
| Fin Physical Structure Impact on Device Performance | |
| Li Fei Sun, Lam Research | |
| Selective Silicon and Silicon Germanium Etch with Over 500 Etch Selectivity | |
| Chien-Pin Sherman HSU, Avantor | |
| Study on the effect of water spraying mode on the N content of wafer surface after SC1 cleaning in light doping process | |
| Jinlei Wang, Shanghai Huali Integrated Circuit Corporation | |
| A Technical Optimization of Waferless Auto Clean for Aluminum Etcher | |
| Li Qi, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| The Research of special gate morphology adjustment and its influence on electrical properties | |
| Junjie Pan, Shanghai Huali Integrated Circuit Corporation | |
| Study of Spacer etching with PR approach | |
| Yuhao Yang, Shanghai Huali Integrated Circuit Corporation | |
| Silicon Surface Roughness Improvement During Plasma Etch | |
| Guang Yang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Investigation of High Aspect Ratio Amorphous Carbon Etching in 3D NAND Flash Memory | |
| Li Zeng, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Study of Photo-resist (PR) Strip Rate with High Temperature Pedestal for AL Patterning Process | |
| Cheng Tian, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Quasi-atomic Layer Etching (ALE) of Silicon Nitride for the Spacer of DRAM Storage Node Contact | |
| Xuehua Wang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Strategy for Line Width Roughness (LWR) Reduction in Carbon Mandrel Patterning | |
| Yichang Liu, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Redistribution Layer Aluminum Advanced Etching Process Development | |
| Xingjun Yao, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Deep Trench (DT) Etching Process for Power MOS Device | |
| Chen Chen, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Si Wafer Breakage improvement by Recipe Optimization | |
| Chunlong Qiu, Applied Materials China | |
| Study of etch chamber wall coating impact on process performance | |
| Songtao Lv, Applied Materials China | |
| Carbon Hard Mask Opening Process Development with Novel Sidewall Passivation in Memory Manufacturing | |
| Meng-Jiao Zhu, Beijing NAURA Microelectronics Equipment Co., Ltd. | |