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Xinfei Guo is currently an assistant professor at Shanghai Jiao Tong University. Before joining academia, he was a Senior SoC Design Engineer at NVIDIA in United States, where he worked in the physical design and EDA department. He helped close high-speed designs such as CPUs from RTL all the way to signoff, and contributed to Nvidia’s groundbreaking Data Processing Unit (DPU) products by over-achieving the performance target by more than 10%. He also worked at IBM Research as an adjunct researcher. His previous work has resulted in five tapeouts and 3 best paper awards. His current research interests include ML/AI-powered design automation, low power and reliable system design and novel architectures for emerging applications. He is an IEEE senior member and an ACM member.
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