Symposium Chair: Dr. Ying Zhang
| ** | to designate keynote talk - 30 min | |||
| * | to designate invite talk - 30 min | |||
| to designate regular talk - 15 min |
Sunday, March 17, 2024 Shanghai International Convention Center
Session I: Lithograpy/Etch joint session (II & III)
Meeting Room: 3H+3I+3J
Session Chairs: Leo Pang / Ying Zhang
| 13:30-13:35 | Opening Remarks |
| **13:35-14:05 | How Process, Equipment, Material, Computation that work together to make up the Performance of Photolithography |
| Qiang Wu, Fudan University | |
| **14:05-14:35 | Novel Etch Solution with Sym3 for Logic BEOL Patterning Etch Applications |
| Hui Sun, Applied Materials | |
| *14:35-15:05 | New Materials and New Functionalities Co-work scaling, and the Exploration of Inner Spacer Technique |
| David Xiao, Qianmo Micros Design LLC | |
| 15:05-15:20 | Coffee Break |
Session II: Advanced Patterning
Meeting Room: 3C+3D
Session Chair: Qingjun Zhao
| *15:20-15:50 | The New Developments in Etching of Dielectrics |
| Yuanwei Lin, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 15:50-16:05 | Study of tungsten-doped carbon hard mask etch using O2/NF3 based chemistry |
| Li-Tian Xu, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 16:05-16:20 | Plasma Corrosion Resistant ALD Coatings for Semiconductor Manufacturing Process Equipment |
| Lassi Leppilahti, Beneq | |
| 16:20-16:35 | A Study on SADP Film Stack Selection for Line Roughness Improvement in Planar 1xnm NAND Flash |
| Yinan Ma, Semiconductor Manufacturing North China (Beijing) Corporation | |
| 16:35-16:50 | A STUDY OF WAFER-LESS AUTO CLEAN EFFICIENCY PROMOTION METHOD IN DOUBLE PATTERNING DIELECTRIC HARD MASK PROCESS |
| Xinruo Su, Semiconductor Manufacturing North China | |
| 16:50-17:05 | Advanced Patterning Solutions for Logic and Memory Device Manufacturing |
| Taiyen Peng, Jiangsu Leuven Instruments Co., Ltd. | |
Monday, March 18, 2024 Shanghai International Convention Center
Meeting Room: 3C+3D
Session III: FEOL/MOL Etching
Session Chair: Hai Cong
| 08:45-09:00 | Challenge of boron-doped silicon hardmask etching |
| Xuehua Wang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 09:00-09:15 | Precise etching technology of ultra thin Al2O3 film using BCl3 chemistry |
| Cheng Tian, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 09:15-09:30 | Reactive Ion Beam Etching of Slanted Gratings for AR Applications |
| Shuo Dong, Jiangsu Leuven Instruments Co.Ltd. | |
| *09:30-10:00 | New development of ICP etching for advanced patterning |
| Zhongwei Jiang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 10:00-10:15 | Coffee Break |
Session IV: Resists Etch/Wet Etch/Clean/MEMS
Session Chair: Hai Cong
| *10:15-10:45 | Review of Advanced Ion Beam Etch Technology: Asymmetrical and Directional Approach |
| Yuxin Yang, Jiangsu Leuven Instruments Co., Ltd. | |
| *10:45-11:15 | The challenges and new developments on TSV etch applications |
| Guorong Li, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 11:15-11:30 | High aspect ratio carbon hardmask etch process for profile and LCDU control |
| Mengjiao Zhu, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 11:30-11:45 | Line edge roughness reduction in high aspect ratio carbon hardmask patterning for slit trench |
| Li Zeng, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 11:45-12:00 | A Fully Automated VPD System for Noble Metal Control during CIS manufacturing |
| Qiao Huang, Jiangsu Leuven Instruments Co., Ltd. | |
| 12:00-13:30 | Lunch Break |
Session V: BEOL Etching and Memory Etch
Session Chair: Qingjun Zhao
| *13:30-14:00 | Challenges of Inductively Coupled Plasma Applications |
| Hu Zhou, Advanced Micro-Fabrication Equipment Inc. China | |
| 14:00-14:15 | Center to Edge Critical Dimension Uniformity Control in High Aspect Ratio Dielectric Etch |
| Jiayu Sun, Lam Research | |
| 14:15-14:30 | Profile Control for BEOL Tri-layer Patterning Scheme |
| Xingxing Xu, Lam Research | |
| 14:30-14:45 | Coffee Break |
Session VI: ALE and Patterning
Session Chair: Kaidong Xu
| *14:45-15:15 | Plasma etching solutions for compound semiconductors |
| Yali Fu, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 15:15-15:30 | Perspective on Plasma Etching in Advanced Packaging |
| Yuanwei Lin, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| 15:30-15:45 | A Study on Floating Gate Profile Control and Reliability Improvement in Planar 1xnm NAND Flash |
| Jun Wang, Peking University | |
| 15:45-16:00 | Analysis of Key Factors in Reactive Ion Etching of SiC Gate Trench |
| Anton Kobelev, Suzhou STR Software Technology Co., Ltd. | |
| 16:00-16:15 | AlCu Residue Elimination Technique during BEOL Etch Process |
| Lian Ye, Jiangsu Leuven Instruments Co.Ltd. | |
| 16:15-16:30 | Ion Beam Etching as a Solution for Ultra-Precision Planarization Process |
| Lei Guo, Jiangsu Leuven Instruments Co., Ltd. | |
| 16:30-16:45 | Ultra low temperature high aspect ratio OX punch through etching |
| Hanlin Cui, Applied Materials |
| Poster Session: | |
| An optimized approach for High-K first process reliability | |
| Li Fei, Nexchip Semiconductor Corporation | |
| An optimized process for high dielectric metal gate processes to avoid SiGe and NiSi contamination | |
| Yongqiang Ding, HeFei JingHe Semiconductor Corporation | |
| The LWR improvement in Metal hard mask etch | |
| Songyu Liu, Nexchip Semiconductor Corporation | |
| Metal line width roughness (LWR) improvement by different kind of photoresist (PR) | |
| Chao Ding, Hefei Jinghe Semiconductor Corporation | |
| Advanced Patterning LELE Cut LCDU Improvement | |
| Ting Xie, Advanced Micro-Fabrication Equipment Company Inc. | |
| Sidewall kink elimination of slanted gratings utilizing a twice-etching method | |
| Jiuru Gao, Jiangsu Leuven Instruments Co., Ltd. | |
| Residue Improvement in Liner OX Open Process | |
| Ruxun Yuan, Lam Research | |
| A STUDY ON THE DIFFERENT APPROACHS OF DUMMY GATE WET REMOVAL APPLICATION | |
| Tianhao Zhang, Lam Research | |
| Mandrel/Non-Mandrel Imbalance Improvement for Self-aligned Reverse Patterning Process | |
| Shiming Zhang, Lam Research | |
| Improvement of Outer Hole Profile Bending in High Aspect Ratio Dielectric Hole Etching | |
| Taojun Zhuang, Lam Research | |
| Improved Si Grass Control during Profile tuning for Silicon Trench Etch in Power MOSFET | |
| Xi Chen, Lam Research | |
| Profile Controlling in High Aspect Ratio Si Trench Etching by Steady-State-Process | |
| Yaming Liu, Lam Research | |
| Research of surface Particle contamination in Selective Nitride Etching Using hot Phosphoric Process | |
| Sutao Liu, Nexchip Semiconductor Corporation | |
| A study of TiN film queue time effect | |
| Malong Cai, Nexchip Semiconductor Corporation | |
| Ultra-Deep via Etching of Silicon Oxide for High-Voltage Capacitive Isolators | |
| Yuyan Xia, Zhejiang University | |
| Optimization of the Polysilicon Gate Etching Process in SONOS Memory Fabrication | |
| Wanli Yang, Zhejiang University | |
| A Study on Bevel Metal Film Remove for Bevel Peeling Defect Reduction | |
| Liu Xuan, Semiconductor Manufacturing North China (Beijing) Corporation | |
| Defect Improvement in Process Containing SiOx Passivation | |
| JunMing Wang, Lam Research | |
| Sn-Ag Compatible Selective Ti Etch in Cu RDL Fabrication and 3D IC Integration | |
| Chien-Pin HSU, Avantor | |
| Improvement of Line Roughness of Fin by Conventional Thermal Oxidation and Atomic Level Low-Temperature Ozone Treatments | |
| Peng Wang, Integrated Circuit Advanced Process R&D Center Institute of Microelectronics of the Chinese Academy of Sciences | |
| The Study of Buffer HF Solution Wet Etch Behavior in Trench Structure | |
| Jiaming Shi, Grandit | |
| Investigation of the Al Etching Rate Change in Copper Damascene Clean Formulation Chemical | |
| Yipeng Wu, Grandit. tech.Co., Ltd. | |
| Reaction temperature impact on Siconi® process | |
| Songtao Lv, applied materials | |
| MTBC Enhancement through new WET Clean implement for preventing wafer breakage | |
| Chunlong Qiu, Applied Materials | |
| A low-cost solution for Selectra™ Si Chamber Etch rate drift | |
| Jing Cao, Applied Materials | |
| Reduce AlF Byproduct Caused ESC Backside Helium Leak in Etch Chamber | |
| Longjie Yu, Applied Materials | |
| Impacts of Al2O3 Window aging on Plasma Ethcing Process | |
| Yanfeng Zhao, Semiconductor Manufacturing International Corporation | |
| TiN Hard Mask Open Comprehensive Study | |
| Shuda Xu, Applied Materials | |
| Improvement of CIS TM Profile by Adjusting Gas Ratio | |
| Ziyue Xuan, Applied Materials | |
| Al BEoL Via Etching Challenge and Solution on Producer-GT™ | |
| Sichao Zeng, Applied Materials | |
| Producer-GT™ High Productivity CCP Etch Solution | |
| Xipeng Tong, Applied Materials | |
| Application of Advanced Pulsing Plasma on DRAM Buried Wordline Fin Profile and Micro Loading Control | |
| Kevin Yao, Lam Research | |
| Application of Hardware and Process Fine Tune for Chamber Matching in DRAM Critical Etch | |
| Nick Fang, Lam Research | |
| Buried-Worldline Omega-Shape Profile Control and Impact in DRAM | |
| Liubo Ma, Lam Research | |
| Mandrel Etch Tuning for Imbalance Improvement in Reverse SADP | |
| Shipeng Gong, Lam Research | |
| Inline Critical Dimension Uniformity Improvement in DRAM Capacitor Hard Mask Etch | |
| Wei Wang, Lam Research | |
| Bosch Process in TSV Application for Controllable Profile and Uniformity | |
| Haoran Cao, Lam Research | |
| Application of Advanced Pulsing and Novel Chemistry in DRAM Capacitor Etch Application | |
| Haoran Cao, Lam Research | |
| HAR HMO tilting offline monitor and chamber to chamber matching solution | |
| Kai Hu, Applied Materials | |
| Methods of Profile Control in HVCAP VIA Etching | |
| Tongyao Zhao, Applied Materials | |
| Profile Control of CIS BVia Silicon Etch | |
| Le Jiang, Applied Materials | |
| Control of BLC Trench Profile Angel in DRAM BLC Etch | |
| Yuchen Jiang, Lam Research | |
| Advanced Mixed Mode Pulsing in DRAM Active Area Etch | |
| Zheng Ruan, Lam Research | |
| The DRAM Capacitor LCDU Improved by Patterning Optimization | |
| Yuyang Sun, Lam Research | |
| A Study of Al etch process defects | |
| Jiajie Li, Applied Materials | |
| Advanced Pulsing in LELE Application for Controllable Profile | |
| Hui Xu, Lam Research | |
| 300mm AL(0.5%Cu+1%Si) Etch Challenge and Solution on Advantage Edge Metal™ | |
| Jianjun Liao, Applied Materials | |
| TiN selectivity improvement for All-in-one Etch | |
| Yifeng Xu, Applied Materials | |
| BCD process contact-etch challenges and solutions at Producer GT | |
| Gang Sheng, Applied Materials | |
| Filled Metal height uniformity optimization in BCAT | |
| Lin Luo, Applied Materials | |
| Study of A-Si as Dry Etch Hard Mask in BEOL Low-k Dielectric Patterning | |
| Juxin Yin, Zhejiang University | |
| Si Trench Profile Control in PMOS Silicon Recess Etching | |
| Zhe Li, Lam Research | |
| Study on Integrated Trench Etching for Trench-Type Power MOSFET | |
| Jingru Shen, Zhejiang University | |
| An approach to achieve a flat bottom in Si trench with oxide & poly pillar | |
| Wei Gu, Applied Materials | |
| Approaches of Pitch Walking Improvement in SAQP Patterning | |
| Rishuai Zheng, Applied Materials | |
| A Method of VIA Etch CD Range Improvement | |
| Qunfeng Wen, Applied Materials | |
| Effect of Low Damage Strip on Si and SiGe Surface State | |
| Shijing Wang, Shanghai AnBang Semi Equipment Co., Ltd. | |
| Oxide Remain Control for BCD ONO Spacer Etch on AMAT Producer GT_Wang Miao_Etch | |
| Miao Wang, Applied Materials | |
| Sym3 Chamber RF Plasma Stability Improvement | |
| Jie Wang, Applied Materials | |
| Gate oxide removal development for legacy node on SiCoNi | |
| Fan Zhou, Applied Materials | |
| Excellent Profile Control for Micro-OLED Anode Etch | |
| Lijun Shan, Applied Materials | |
| The influence of etching conditions on local loading in Deep Silicon Etching | |
| Yiming Ma, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| A STUDY OF DEEP HOLE ETCHING IN MO&DIELECTRIC ALTERNING MULTILAYER STRUCTURE | |
| Zhe Wang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| A Study of High Aspect Ratio Si Trench in Cycle Mode Etching with Mask no Loss | |
| Teng Zhang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Side-wall angle uniformity improvement during ICP etch | |
| Dong Li, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Two Step Etching Method for Removing Thick Photoresist | |
| Long Ji, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Flattening the Silicon Nitride surface of semiconductor chips through etching | |
| Donghan Wang, Beijing NAURA Microelectronics Equipment Co., Ltd. | |
| Reducing Side Cutting During Wet Etching of Gate oxide layer for 28HK metal gate process | |
| Chunshan Zhao, Shanghai Huali Integrated Circuit Corporation | |
| A dry etch method to improve trench type oxide contact etch sidewall striation caused by incoming photo resist roughness | |
| Shanshan (Sera) Nie, Lam Research | |
| A Study on RCA clean particle performance improvement | |
| Xiaowei Cheng, Lam Research | |
| Application of Advanced Plasma Pulsing in a R-SADP (Reversed Self-aligned Double Patterning) Etch Process | |
| Peng Zuo, Lam Research | |
| Novel Method for Titanium Nitride Wet Etch Thickness Dynamic Control | |
| Chen Zhang, Lam Research | |
| Wafer Thinning Thickness Control with In-situ Measurement on Rough Silicon Surface | |
| Zhi Shen, Lam Research | |
| Nested Bosch Process | |
| Changhuo Liu, Semiconductor Manufacturing North China | |
| Optimized AMMP for High Aspect-Ratio Bottom Contact Open Process in DRAM Applications | |
| Rick Yang, Lam Research | |