| ** | to designate keynote talk | Sponsored by: |
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| * | to designate invite talk | |||
| to designate regular talk |
Sunday, March 14, 2021 Shanghai International Convention Center
Meeting Room: 3rd Floor Yellow River Hall
Session I: Beyond CMOS Devices for Low Power Applications
Session Chair:
| *14:00-14:25 | CMOS device design with ferroelectric materials |
| Changhwan Shin, Sungkyunkwan University | |
| *14:25-14:50 | Modeling of Ferroelectric FET |
| Kai Ni, Rochester Institute of Technology | |
| *14:50-15:15 | High performance electronics based on ultrathin novel channel materials |
| Yanqing Wu, Peking University | |
| 15:15-15:30 | Si/SnS2 vertical heterojunction tunneling transistor with ionic-liquid gate for ultra-low power application |
| Liang Chen, Peking University | |
| 15:30-15:45 | Light-modulated Subthreshold Swing Effect in a MoS2-Si Hetero MOSFET |
| Yingxin Chen, Fudan University | |
| 15:45-16:00 | Coffee Break |
Session II: Advanced Device and Technology for AI
Session Chair:
| *16:00-16:25 | Smart Manufacturing of Si,SiC,GaN Power Devices in AI Era |
| Chi Min-hwa, SiEn (Qindao) Integrated circuits Cor. | |
| *16:25-16:50 | Trends and Challenges in Sensory Perception |
| Ming He, Peking University | |
| 16:50-17:00 | A Novel Lightweight PUFs Using Interconnect Line Mismatch for Hardware Security |
| Yuejun Zhang, Ningbo University | |
Monday, March 15, 2021 Shanghai International Convention Center
Meeting Room: 3rd Floor Yellow River Hall
Session III: Advanced Device Reliability and Characterization
Session Chair:
| *9:00-9:25 | Frontiers in low-frequency noise research in advanced semiconductor devices |
| Eddy Simoen, IMEC and University of Gent | |
| *9:25-9:50 | FEOL Reliability in Gate-All-Around Nanosheet Devices (Invited) Nanosheet Devices (Invited) |
| Miaomiao Wang, IBM | |
| 9:50-10:05 | Low Frequency Noise in 16-nm FinFET |
| Gang WANG, Rockchiption | |
| 10:05-10:20 | Coffee Break |
Session IV:Negative-Capacitance FET
Session Chair:
| *10:20-10:45 | Source/Drain contact technology for next generation semiconductor devices |
| Hyun-Yong Yu, Korea University | |
| *10:45-11:10 | Maskless Optical Nanolithography for Efficient Cross-scale Patterning |
| Xuanming Duan, Jinan University | |
| 11:10-11:25 | A Mechanism Study of High-k Dielectric Quality and Metal Gate Al Diffusion Affecting PPU Transistor Threshold Voltage |
| Weiwei Ma, Shanghai Huali Integrated Circuit Corporation | |
| 11:25-11:40 | The Systematic Investigation about Al diffusion and Efficient Improvement on Device Variation and Uniformity Under 28nm |
| Zhejun Liu, Shanghai Huali Integrated Circuit Corporation | |
| 11:40-11:55 | The Effects of Poly Corner Etch Residue on Advanced FinFET Device Performance |
| Wang Qingpeng, Coventor Inc., A Lam Research Company | |
| Poster Session: | |
| High-K Bubble Defect Researches in Stack-BSI Process Product | |
| Zhuo Yin, Peking University | |
| 3D Nano Gateline Slit Hardmask tilting improvement with MoragaMoraga | |
| Xiantao Luo, Applied Materials | |
| Super Junction by Implant Through Trench Contact for Low-Voltage Power MOSFET and IGBT | |
| Janifer Liu, SiEn (Qindao) Integrated circuits Cor. | |
| Impact of Contact Misalignment on Vt for Trench Power MOSFET | |
| Perry Li, SiEn (Qindao) Integrated circuits Cor. | |
| Numerical Study of the VDMOS with an Integrated High-K Gate Dielectric and High-K Dielectric Trench | |
| Zhenyu Zhang, Nanjing University of Posts and Telecommunications | |
| Wafer Edge Crack Defect Investigation and Improvement In 19nm PSZ DEP Process | |
| Junwei Han, Shanghai Huali Microelectronics Corporation | |
| FinFET GGNMOS DC parameter variation understanding and ESD performance improvement solution by TCAD simulation | |
| Hui Shen, Semiconductor Manufacturing International (Shanghai) Corporation | |
| Effect of Floating-Gate Polysilicon Depletion on the Program/Erase Cycling Endurance Characteristics of 2y NAND Flash Memory | |
| Jinho Kim, Dosilicon Co., Ltd. | |
| Optimize The Cleaning Process of Tungsten Contact CMP to Avoid Copper Wire Bridges and Improve Product Yield | |
| Jinfeng Wang, Shanghai Huali Microelectronics Corporation | |
| FDSOI SiP Epitaxy Optimization For Leakage Reducing | |
| Jiaqi Hong, Shanghai Huali Integrated Circuit Corporation | |
| Etch back before ILD-CMP for improving the loading issue after ILD-CMP | |
| Dongyangyang, Shanghai Huali Integrated Circuit Corporation | |
| Research and improvement of residue defects in HK gate process based on CMP process | |
| Duanqingqing, Shanghai Huali Integrated Circuit Corporation | |
| AN EFFECTIVE METHOD FOR IMPROVING THE RESISTANCE OF RRAM AT LOW RESISTANCE STATUS | |
| Yaguo Cai, Shanghai Huali Integrated Circuit Corporation | |
| The Effect of Different Well Implant Element on Different Pitch Size CMOS Image Senor | |
| Li Xiaoyu, Shanghai Huali Microelectronics Corporation | |
| Advance manufacturing process of LCOS based on Copper Reflector | |
| GuoZhao, Shanghai Huali Microelectronics Corporation (HLMC) | |
| Single Patterning ILT for Advanced Memory Challenging Design | |
| Camille Xu, Changxin Memory Technologies Inc. | |
| The comprehensive solution of Ultra Top Metal stress impact on Seal Ring | |
| LiuQIANG, Shanghai Huali Microelectronics limited Corporation | |
| Demonstration of Full Well Capacity Monitoring and Optimizing through WAT Test | |
| Lu Wang, Shanghai Huali Microelectronics Corporation | |
| Improved method to analysis the doping profile for ion implants in silicon | |
| Hui Chen*, Xiaoyu Li, Zhengying Wei, Chang Sun, Jiong Xu, Ming Wang, Qian Wang, Shanghai Huali Microelectronics Corporation | |
| Method of Reducing Metal Damager Defects in Back End of Line For Semiconductor in 28nm Technology | |
| ShanshanChen, Shanghai Huali Microelectronics Corporation | |
| The Influence of the Gap of CCP System on | |
| Liu Zheng Yang, Lam Research | |
| Preheat Effect on Lamphead Pressure for 3D NAND Block Oxide Thickness Control | |
| Yang Liu, Applied Materials (China) | |
| Applied Materials® RF PVD for DRAM Metal Gate Process Development | |
| Jiachuan Wu, Applied Materials | |
| Improvement of Yield by Process Modulation of PECVD SAB Silicon-Rich Oxide Films | |
| GUO Guilue, Lam Research | |
| Research on laser sealing technology of titanium alloy for microwave module | |
| Na Li, The 13th Research Institute, China Electronics Technology Group Corporation | |
| Research on the effect of formic acid vacuum sintering process on hydrogen content in the product | |
| Na Li, The 13th Research Institute, China Electronics Technology Group Corporation | |
| Influence of Negative DIBL Effect on MOSFET Effective Drive Current and CMOS Circuit | |
| Weixing Huang, Institute of Microelectronics of Chinese Academy of Sciences | |
| An Organic Memristor based on Au/MF-2/ITO with Binary Neural Network for Roman Numeral Recognition | |
| Yuejun Zhang, Ningbo University | |
| Non-Linear Resistive Switching Characteristics in HfO2-based RRAM with Low-Dimensional Material Engineered Interface | |
| Linbo Shan, Peking University | |
| A Configurable Computing-in-Memory Structure Based on Convolutional Neural Network | |
| Jiancheng Yang, Peking University | |
| Engineering of substrate oxidation in deposited SiC Gate stacks for improving interface performance | |
| Shuo Liu, Shanghai Jiao Tong University | |
| Improvement of RRAM Uniformity and Analog Characteristics through Localized Metal Doping | |
| Yabo Qin, Zongwei Wang*, Qingyu Chen, Yaotian Ling, Lindong Wu, Yimao Cai*,Ru Huang, Peking University | |
| Impacts of Ferroelectric Parameters on the Electrical Characteristics of FeFET for Low-power Logic and Memory Applications | |
| Kaifeng Wang, Peking University | |
| Study of GIDL Leakage of High Dynamic CMOS Image Sensor | |
| Zhi Tian, HLMC | |